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NVIDIA moved the memory controller off the chip and put it inside the memory itself

NVIDIA Blog · event date: 26 August 2026Infra

On 26 August NVIDIA added NVHBM to NVLink Fusion - memory whose base die now carries their own controller. The claim is up to 30 per cent more bandwidth, 15 per cent less power and up to a quarter of the compute die freed up. Amazon's Annapurna Labs goes first.

In short
  • The memory controller traditionally lives on the compute die and eats area that could otherwise be doing arithmetic.
  • NVHBM moves it into the base die of the HBM stack and hands a ready implementation to several memory vendors.
  • The move is aimed at other people's accelerators - NVLink Fusion is the door to semi-custom silicon.
Checked on28 August 2026Responsible editorTsvetelin IvanovHow we workMethod · Corrections

Space on silicon is like space on a stage. Whatever you give to the equipment, you take from the performer.

On every accelerator today, part of the die computes nothing - it serves the memory. The controller sits there because that is how it has been done for years, occupying area that could otherwise be doing arithmetic. On a chip costing tens of thousands of dollars, that is expensive storage space.

The facts: on 26 August 2026 NVIDIA expanded NVLink Fusion with NVHBM, a high-bandwidth memory technology in which NVIDIA's own memory controller is integrated into the base die of the HBM stack rather than sitting on the accelerator die. Per the company this delivers up to 30 per cent more memory bandwidth, 15 per cent lower HBM power consumption, and frees up to 25 per cent more area on the compute die compared with standard HBM4E. NVIDIA is establishing a single standard NVHBM implementation to be validated and offered by multiple memory providers, so that integration work is not repeated by every customer. The technology is the same one NVIDIA says it will use in its future GPUs. Amazon's Annapurna Labs is the first company to work on NVHBM, as part of its broader collaboration with NVIDIA around NVLink Fusion. The post is by Jesse Clayton.

Who this is really for

Not their own accelerators. NVLink Fusion is the programme through which other people's chips attach to NVIDIA's network and ecosystem - which is to say, exactly the companies building custom silicon so they depend on NVIDIA less. Amazon is the textbook case.

That is what makes the move more interesting than the numbers. If you build your own chip to get free of one supplier, and the memory, the network and the standard around it are still theirs, the escape is partial. What is being sold is independence running on someone else's rails.

Your chip is welcome here, as long as it travels on our network.

The numbers, of course, are theirs, quoted against standard HBM4E, with no independent verification. Thirty per cent of bandwidth and a quarter of the die freed are serious gains if they hold up in a shipping product - and no such product has been announced yet.

If you follow the accelerator market because of what it costs you, watch this direction. The fight stopped being about whose chip computes faster a while ago; it is about whose memory and whose network sit underneath it.

The visual is generated code art. No third-party images.
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Official primary sources
→NVIDIA Blog - NVIDIA NVLink Fusion Expands With NVHBM Custom High-Bandwidth Memory, 26.08.2026
Original: https://wearecoded.com/en/articles/nvidia-nvhbm-kontroler-v-pametta.html
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